Recently, there has increasingly been desired for the development of a technique which permits the more finely processing step with respect to the thin film-forming technique used in the field of the semiconductor and this results in the occurrence of a variety of related problems.
In an example of the technique for forming electrical connections of a thin film in a semiconductor device, copper has mainly be used as a material for the electrical connection because of its low resistivity. However, it is technically difficult to etch copper and copper may easily penetrate or diffuse into the underlying layer such as an insulating film and accordingly, a problem arises such that the reliability of the resulting device is lowered.
To solve this problem, such diffusion of the copper has conventionally been prevented by forming a metal thin film (or a conductive barrier film) on the inner wall surface of the interlayer-connecting holes in a multi-layered electrical connection structure according to, for instance, the CVD technique; and then forming a layer for making the electrical connections by the application of a copper thin film on the conductive barrier film so that the resulting copper thin film never comes in direct contact with the underlying insulating film such as a silicon oxide film (see, for instance, Japanese Un-Examined Patent Publication 2002-26124 (Claims and the like)).
In this case, it has been required that fine contact holes, trenches or the like each having a high aspect ratio should be plugged or filled up with a thin barrier film while ensuring a high rate of step-coverage, in response to the foregoing demands for the use of electrical connections having a multi-layered structure and a further miniaturized pattern.